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SYNPLICITY’S SYNPLIFY PRO VERIFICATION
SYNPLICITY’S SYNPLIFY PRO SOFTWARE

After the actual temperature of the die is captured, the value is read back via the FPGA configuration port. A ring-oscillator together with its auxiliary blocks (basically counting and control stages) is first placed in the design. The main idea is that a fully digital temperature transducer can be dynamically inserted, operated, and eliminated from the circuit under test using reconfiguration. Summary: This seminar summarizes a thermal monitoring strategy suitable for field programmable logic array (FPGA)-based systems. Venue: Universidad CAECE, Olavarría Mar del Plata

SYNPLICITY’S SYNPLIFY PRO VERIFICATION

Speaker: Gustavo Sutter, Universidad Autónoma de MadridĮuroform Seminar: Thermal Verification of FPGAsĭate and Time: March 1, 2007, 11:30 to 12:30.

USAĮuroform Seminar: Embedded Systems on FPGAsĭate and Time: March 1, 2007, 09:00 to 11:00.

Recommended and not recommended design practices.

This seminar also covers good practices for Chip design in general. Summary: The seminar covers things to be taken into consideration when converting an FPGA design to an ASIC. Title: ASIC Design Methodology Basics and FPGA Conversions Speaker: Elías Todorovich, Universidad Autónoma de MadridĬhipX Seminar: ASIC Design Methodology Basics and FPGA conversionsĭate and Time: February 28, 2007, 15:30 to 17:00. The course will familiarize the designer with the FPGA design flow Summary: This seminar introduces the new user

SYNPLICITY’S SYNPLIFY PRO SOFTWARE

Title: FPGA Synthesis with Synplify Pro® Software March 12-14 and 19-21, 2007 (Universidad Nacional del Centro, Tandil, Argentina) FPGAs Technology Course (in Spanish language)ĭate and Time: February 28, 2007, 12:40 to 15:30

Synplicity Seminar: FPGA Synthesis with Synplify Pro® SoftwareĬhipX Seminar: ASIC Design Methodology Basics and FPGA Conversions There are several free training activities after the SPL 2007: